1. Field of Invention
The present invention relates in general to the video signal processing technology, and more particularly to the video signal processing technology for adjusting the resolution.
2. Related Art
In the conventional video signal processing technology, a video signal processing apparatus usually needs to transfer the data with different resolutions to the resolution required by a rear-end display apparatus in order to satisfy the format of the output signal.
FIG. 1 is a block diagram showing a conventional video signal processing system. Referring to FIG. 1, the video signal processing apparatus includes a memory 110, a scaling circuit 120 and an encoding unit 130. Under the condition when the specification of the video image received by the video signal processing apparatus corresponds to the pixel data with the resolution of 320×240 (QVGA), and the specification of the outputted video signal has the resolution of 640×480 (VGA), the memory 110 needs at least the memory spaces 113 and 115 for temporarily storing the received QVGA pixel data with the resolution of 320×240 and the VGA pixel data with the resolution of 640×480, respectively. The scaling circuit 120 firstly outputs a read request to the memory 110 once so as to read the QVGA pixel data with the resolution of 320×240 from the memory space 113 of the memory 110. Thereafter, the scaling circuit 120 scales up the QVGA pixel data into the VGA pixel data with the resolution of 640×480. Finally, the scaling circuit 120 outputs a write request to the memory 110 so that the VGA pixel data with the resolution of 640×480 is written into the memory space 115 of the memory 110.
Next, the encoding unit 130 outputs the read request to the memory 110 to read the VGA pixel data, which has the resolution of 640×480 and is stored in the memory space 115, and thus encodes the data into the signal (e.g., the composite signal) having the signal format that can be accepted by a television 150. Thereafter, the encoding unit 130 outputs the transferred analog video signal to the television 150.
In the operation of the video signal processing apparatus, the scaling circuit 120 must output the read request to the memory 110 again and again so as to read the QVGA pixel data, which has the resolution of 320×240 and is stored in the memory 110. In addition, after the scaling circuit 120 scales the QVGA pixel data, it further has to output the write request to the memory 110 so as to store the VGA pixel data with the resolution of 640×480 into the memory 110. Furthermore, the encoding unit 130 also has to read the VGA pixel data, which has the resolution of 640×480 and is stored in the memory 110, so as to perform the encoding process. Therefore, the read and write requests at each time occupy the relatively high bandwidth for the memory 110. More particularly, when the picture of the pixel data gets larger or the resolution thereof gets higher, the occupied bandwidth also becomes higher. In the embedded hardware architecture, the usage of the bandwidth of the memory 110 greatly influences the quality of the system. So, the quality of the conventional video signal processing apparatus is usually limited by the bandwidth of the memory 110. In addition, the memory 110 needs at least the memory spaces 113 and 115 for storing the QVGA pixel data and the VGA pixel data owing to this architecture. Thus, the memory 110 occupies a relatively large layout space of the integrated circuit.
In addition, when the resolution of the video signal to be received by the television 150 has the ratio of 3:2 or 16:9, which is not the resolution with the standard ratio (e.g., the resolution is 720×480), the displayed picture has the incorrect ratio when the display apparatus directly displays the video signal coming from the video signal processing apparatus. FIG. 2 shows the picture displayed by the conventional video signal processing apparatus when the resolution of the television does not have the standard ratio. As shown in FIG. 2, the picture 210 is the original picture corresponding to the VGA pixel data with the resolution of 320×240, and the picture 220 is the picture, which is obtained after the scaling operation is performed and corresponds to the VGA pixel data with the resolution of 640×480. The picture 230 is the picture displayed on the television 150 and having the resolution of 720×480. According to the pictures 210 to 230, it is obtained that the scaled picture 220 is the same as the original picture 210 and has the perfect circular pattern. However, the picture 230 displayed in the television 150 is obviously distorted so that the displayed picture is turned into an ellipse. Therefore, the television 150 must perform a horizontal scaling process on the received video data, or the design of the scaling circuit 120 in the video signal processing apparatus has to be adjusted so that the problem of picture distortion can be solved. However, this design greatly increases the hardware cost of the system. In addition, the scaling circuit 120 needs to perform the scaling operation on the overall picture datum in the hardware architecture of the embedded system, so the hardware complexity of the overall video signal processing apparatus is also increased, and the hardware cost of the embedded system is also greatly increased.